GAOTek SFP DWDM Transceiver SFPDW-104, 3.072Gb/s and 40km

PIN Descriptions:

Notes:

1. Circuit ground is internally isolated from chassis ground.
2. Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V
3. Should be pulled up with 4.7k – 10kohms on host board to a voltage between 2.0V and 3.6V.MOD_DEF (0) pulls line low to indicate module is plugged in.
4. This is an optional input used to control the receiver bandwidth for compatibility with multiple data rates (most likely Fiber Channel 1x and 2x Rates).If implemented, the input will be internally pulled down with > 30kΩ resistor. The input states are:

• Low (0 – 0.8V): Reduced Bandwidth
• (>0.8, < 2.0V): Undefined
• High (2.0 – 3.465V): Full Bandwidth
• Open: Reduced Bandwidth

5. LOS is open collector output should be pulled up with 4.7k – 10kohms on host board to a voltage between 2.0V and 3.6V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.

Electrical Interface Characteristics:

Note (1): A (TX) + B (RX) = 300mA (Not include termination circuit)

Ordering Information

Digital Diagnostic Functions

GAOTek GAO-SFPDW-104 transceivers support the 2-wire serial communication protocol as defined in the SFP MSA. It is very closely related to the E2PROM defined in the GBIC standard, with the same electrical specifications. The standard SFP serial ID provides access to identification information that describes the transceiver’s capabilities, standard interfaces, manufacturer, and other information.

Additionally, GAOTek SFP transceivers provide a unique enhanced digital diagnostic monitoring interface, which allows real-time access to device operating parameters such as transceiver temperature, laser bias current, transmitted optical power, received optical power and transceiver supply voltage .It also defines a sophisticated system of alarm and warning flags, which alerts end-users when particular operating parameters are outside of a factory set normal range.

The SFP MSA defines a 256-byte memory map in E2PROM that is accessible over a 2-wire serial interface at the 8 bit address 1010000X (A0h). The digital diagnostic monitoring interface makes use of the 8 bit address 1010001X (A2h), so the originally defined serial ID memory map remains unchanged. The interface is identical to, and is thus fully backward compatible with both the GBIC Specification and the SFP Multi Source Agreement.

The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed through a 2-wire serial interface. When the serial protocol is activated, the serial clock signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the SFP transceiver into those segments of the E2PROM that are not write-protected. The negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of 8-bit data words that can be addressed individually or sequentially.

Digital diagnostics for the GAO-SFPDW-104 are internally calibrated by default.

Recommended Circuit Schematic

Mechanical Specifications

Applications

• C Band DWDM networks
• SONET/SDH networks
• Fiber channel
• Gigabit Ethernet