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Digital Logic Analyzer with High-Speed Capture & Display- GAOTek
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GAOTek Logic Protocol Analyzer for PCI Express

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SKU: GAOTek-PELA-106 Categories: , ,
Description

Description

Features

  • Spans all protocol layers from physical to transaction layer.
  • Feature-rich software with Transaction and Summary Profile windows for improved information density.
  • Hardware acceleration, OpenEYE, ScopePHY, and FastSYNC for fast data access and quicker test system confidence.
  • Powerful trigger and filtering capabilities to focus on data of interest.
  • Complete suite of probing solutions for various form factors and applications.

 

Technical Specifications

OpenEYE Equalization You can probe anywhere on the bus thanks to OpenEYE Technology with automatic tuning equalization circuitry
ScopePHY Probing Quickly gain confidence that your setup is correct and your PCI signal meets probe input requirements by routing any signal directly to a high bandwidth Oscilloscope
FastSYNC Guaranteed resynchronization time to be <12 FTS1 (PCIe2) or <4 FTS2 (PCIe3) regardless of the Electrical Idle time for Advanced Power State Management performance
Data Storage and HW Accelerated Search Get access to data and execute searches on any pattern in seconds regardless of record length
Comprehensive Trigger System Quickly build a trigger definition to trigger on the most elusive PCIe events occurring on Link
Innovative Data Views Get unprecedented visibility into your data from Protocol to Physical layer 

  • Observe and Analyze Link based behavior of protocol elements (transactions, packets, fields, ordered sets) with the Transaction Window
  • Get high-ground visibility of system issues involving flow control with Unique Bird’s EyE Viewintegrated into the Transaction window
  • Get a data rich statistic based view of all PCIe protocol elements through summary Profile Window
  • Get insight into physical layer details with the unique Listing window showing packet details as well as lane by lane symbol decode
MultiBus Correlation Get full system visibility of multiple busses (DDR, PCIe, QPI, etc.) as well as other system level activity through the legacy power of the Logic Analyzer functionality